JPH0455331B2 - - Google Patents

Info

Publication number
JPH0455331B2
JPH0455331B2 JP58138857A JP13885783A JPH0455331B2 JP H0455331 B2 JPH0455331 B2 JP H0455331B2 JP 58138857 A JP58138857 A JP 58138857A JP 13885783 A JP13885783 A JP 13885783A JP H0455331 B2 JPH0455331 B2 JP H0455331B2
Authority
JP
Japan
Prior art keywords
substrate
resistance
semiconductor substrate
main surface
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58138857A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6031231A (ja
Inventor
Yoshiaki Matsushita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP58138857A priority Critical patent/JPS6031231A/ja
Priority to IT22056/84A priority patent/IT1220993B/it
Priority to DE19843427977 priority patent/DE3427977A1/de
Publication of JPS6031231A publication Critical patent/JPS6031231A/ja
Priority to US07/057,672 priority patent/US4885257A/en
Publication of JPH0455331B2 publication Critical patent/JPH0455331B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/834Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge further characterised by the dopants
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/003Anneal
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/024Defect control-gettering and annealing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/06Gettering
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/076Implant
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/083Ion implantation, general
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/097Lattice strain and defects
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/127Process induced defects

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Semiconductor Memories (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
JP58138857A 1983-07-29 1983-07-29 半導体基体の製造方法 Granted JPS6031231A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP58138857A JPS6031231A (ja) 1983-07-29 1983-07-29 半導体基体の製造方法
IT22056/84A IT1220993B (it) 1983-07-29 1984-07-26 Substrato semiconduttore e processo di realizzazione dello stesso
DE19843427977 DE3427977A1 (de) 1983-07-29 1984-07-28 Halbleitersubstrat und verfahren zur herstellung eines halbleitersubstrates
US07/057,672 US4885257A (en) 1983-07-29 1987-06-02 Gettering process with multi-step annealing and inert ion implantation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58138857A JPS6031231A (ja) 1983-07-29 1983-07-29 半導体基体の製造方法

Publications (2)

Publication Number Publication Date
JPS6031231A JPS6031231A (ja) 1985-02-18
JPH0455331B2 true JPH0455331B2 (en]) 1992-09-03

Family

ID=15231765

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58138857A Granted JPS6031231A (ja) 1983-07-29 1983-07-29 半導体基体の製造方法

Country Status (4)

Country Link
US (1) US4885257A (en])
JP (1) JPS6031231A (en])
DE (1) DE3427977A1 (en])
IT (1) IT1220993B (en])

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5219632A (en) * 1988-02-24 1993-06-15 Haruhito Shimakura Compound semiconductor single crystals and the method for making the crystals, and semiconductor devices employing the crystals
JP2733975B2 (ja) * 1988-08-11 1998-03-30 日本電気株式会社 半導体装置
US5037766A (en) * 1988-12-06 1991-08-06 Industrial Technology Research Institute Method of fabricating a thin film polysilicon thin film transistor or resistor
US5250445A (en) * 1988-12-20 1993-10-05 Texas Instruments Incorporated Discretionary gettering of semiconductor circuits
US5066599A (en) * 1989-07-27 1991-11-19 Fujitsu Limited Silicon crystal oxygen evaluation method using fourier transform infrared spectroscopy (ftir) and semiconductor device fabrication method using the same
JPH0377329A (ja) * 1989-08-19 1991-04-02 Fujitsu Ltd 半導体装置の製造方法
US5554883A (en) * 1990-04-28 1996-09-10 Mitsubishi Denki Kabushiki Kaisha Semiconductor device and manufacturing method therefor
US5066359A (en) * 1990-09-04 1991-11-19 Motorola, Inc. Method for producing semiconductor devices having bulk defects therein
US5198371A (en) * 1990-09-24 1993-03-30 Biota Corp. Method of making silicon material with enhanced surface mobility by hydrogen ion implantation
JP2726583B2 (ja) * 1991-11-18 1998-03-11 三菱マテリアルシリコン株式会社 半導体基板
IT1255764B (it) * 1992-05-15 1995-11-15 Enichem Struttura soi con ossido sottile e profondo ottenuta per impiantazioneionica ad alta energia e successivi trattamenti termici.
JP3384506B2 (ja) * 1993-03-30 2003-03-10 ソニー株式会社 半導体基板の製造方法
DE69526485T2 (de) * 1994-12-12 2002-12-19 Advanced Micro Devices, Inc. Verfahren zur Herstellung vergrabener Oxidschichten
JP2701803B2 (ja) * 1995-08-28 1998-01-21 日本電気株式会社 半導体装置の製造方法
US5646053A (en) * 1995-12-20 1997-07-08 International Business Machines Corporation Method and structure for front-side gettering of silicon-on-insulator substrates
JPH09232324A (ja) * 1996-02-23 1997-09-05 Nec Corp 半導体基板及びその製造方法
JPH10242153A (ja) 1997-02-26 1998-09-11 Hitachi Ltd 半導体ウエハ、半導体ウエハの製造方法、半導体装置および半導体装置の製造方法
FR2762138B1 (fr) * 1997-04-11 1999-07-02 Sgs Thomson Microelectronics Transistor mos a fort gradient de dopage sous sa grille
KR100409120B1 (ko) * 1997-09-30 2003-12-06 인피니언 테크놀로지스 아게 실리콘 함유 기능 층 및 이산화 실리콘으로 만들어진 절연층을 포함하는 제품 및 상기 제품을 제조하기 위한 방법
US6022793A (en) * 1997-10-21 2000-02-08 Seh America, Inc. Silicon and oxygen ion co-implantation for metallic gettering in epitaxial wafers
KR100328455B1 (ko) 1997-12-30 2002-08-08 주식회사 하이닉스반도체 반도체소자의제조방법
US6638832B2 (en) 2000-12-21 2003-10-28 Bae Systems Information And Electronic Systems Integration, Inc. Elimination of narrow device width effects in complementary metal oxide semiconductor (CMOS) devices
US6339011B1 (en) * 2001-03-05 2002-01-15 Micron Technology, Inc. Method of forming semiconductive active area having a proximity gettering region therein and method of processing a monocrystalline silicon substrate to have a proximity gettering region
US6800887B1 (en) * 2003-03-31 2004-10-05 Intel Corporation Nitrogen controlled growth of dislocation loop in stress enhanced transistor
US20090004458A1 (en) * 2007-06-29 2009-01-01 Memc Electronic Materials, Inc. Diffusion Control in Heavily Doped Substrates
US20090004426A1 (en) * 2007-06-29 2009-01-01 Memc Electronic Materials, Inc. Suppression of Oxygen Precipitation in Heavily Doped Single Crystal Silicon Substrates
KR20150134543A (ko) * 2014-05-22 2015-12-02 삼성전자주식회사 소자 제조용 기판 및 반도체 소자
DE102016125340A1 (de) * 2016-12-22 2018-06-28 Infineon Technologies Ag Verfahren zum Bilden eines Halbleitersubstrats, Verfahren zum Bilden eines Halbleiterbauelements, Halbleitersubstrat und Halbleiterbauelement
US10522367B2 (en) * 2017-03-06 2019-12-31 Qualcomm Incorporated Gettering layer formation and substrate

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JPS57177530A (en) * 1981-04-27 1982-11-01 Hitachi Ltd Processing of semiconductor wafer
JPS57201032A (en) * 1981-06-04 1982-12-09 Nec Corp Silicon single crystal semiconductor device
JPS58102528A (ja) * 1981-12-14 1983-06-18 Toshiba Corp 半導体ウエ−ハの処理方法
JPS5925230A (ja) * 1982-08-03 1984-02-09 Toshiba Corp シリコンウエハの製造方法
JPS5984432A (ja) * 1982-11-05 1984-05-16 Nec Corp シリコン基板
US4608096A (en) * 1983-04-04 1986-08-26 Monsanto Company Gettering
DE3473971D1 (en) * 1984-06-20 1988-10-13 Ibm Method of standardization and stabilization of semiconductor wafers

Also Published As

Publication number Publication date
DE3427977A1 (de) 1985-04-11
US4885257A (en) 1989-12-05
IT1220993B (it) 1990-06-21
DE3427977C2 (en]) 1989-08-31
JPS6031231A (ja) 1985-02-18
IT8422056A0 (it) 1984-07-26

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